OK, so I know who you are now ...
The external RAM on PPM B1 was requested by a customer when PPM B1 was developed ... we are not at liberty to release their 8051 code, which utilizes the external RAM. However, I can give you some pointers:
1) The RAM is treated as off-chip RAM.
2) You must control HIADR_PORT (to set the HIADDR port to the PDATA page) and EMIOCN (to make sure it's set to the PDATA page), on their respective (SFR) pages.
3) The hi address port is P6.
4) -CS is P5.6, BANK_SEL is P5.7, and the control port is P5.
The hardware connections, you can see via the schematics, which you have access to.
Once you've configured the C8051 for this external memory -- and told the KC51 compiler where that memory is -- then you can use it as off-chip memory. I don't recall if it's pdata or xdata ...