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18F452 build "tut6" builds with change to "TMR0"

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18F452 build "tut6" builds with change to "TMR0"

Postby floydg » Wed Oct 26, 2005 12:27 am

TMR0 in isr.c is not defined. TMR0L and TMR0H is defined in p18f452.h

Isr.h does perform remapping of TMR0 to TMRL for "SYSP" build control flag:

#if defined(SYSP)
#define TMR0 TMR0L

So I added the following:

// FRG Added this code.
#if defined(SYSE)
#define TMR0 TMR0L

But I do not get any breakpoints to get hit/triggered in the three tasks that should be running, when using the simulator.

I lowered the timer reload value, to attempt to get the system to hit faster.

//FRG to speed up simulator #define TMR0_RELOAD 156 /* for 100Hz ints @ 4MHz */
#define TMR0_RELOAD 3

Still no break points are hit in the three tasks. The timer isr "ISRHigh() does get hit, and the reload value is applied.

Posts: 1
Joined: Tue Oct 25, 2005 11:00 pm
Location: Grass Valley, California, USA

Re: 18F452 build "tut6" builds with change to "TMR0"

Postby aek » Wed Oct 26, 2005 1:02 am

Hi Floyd.

Sorry to hear you're having problems -- that code has been updated to read:

#elif defined(SYSE)

#pragma interrupt ISRHigh save=PROD,section(".tmpdata")

void ISRHigh( void )
if ( INTCONbits.TMR0IE && INTCONbits.TMR0IF ) {
INTCONbits.TMR0IF = 0;


If OSTimer() is being hit, then tasks with delays and/or timeouts will run. Generally, am inability to break on a task with MPSIM may be a by-product of the simulator / debugger not properly associating the line you've set a breakpoint on with the actual code line.

Is <counter> ticking upwards?

We use MPSIM extensively to test Salvo code, and have no problems getting the breakpoints to work ...


Posts: 1888
Joined: Sat Aug 26, 2000 11:00 pm

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