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PIC24FJ256GA110 Parallel Master Port

PostPosted: Tue Dec 03, 2013 8:37 am
by jepost
Reference Document Title "CSK PSPM D" Document Number "00587B-2.SCH", Dated "December 16, 2011."

The Flight MCU schematic shows pins 93 and 94 of the PIC24F are not connected to the motherboard. If so, this means there is no connection to bits PMD0 and PMD1 of the Parallel Master Port. Thus, only 6 of the 8 bits of the PMP are useable. Is this a correct interpretation?

Unlike most of the PIC24F peripherals, it does not appear that the PMP pins are programmable. Is there a hardware or software work-around to allow connection to bits PMD0 and PMD1 of the Parallel Master Port?

Thanks!

ERAU EagleSAT

Re: PIC24FJ256GA110 Parallel Master Port

PostPosted: Tue Dec 03, 2013 12:20 pm
by Andrew
You are correct -- support for the PMP low on the priorities list for PPM D1 and is not supported -- the focus was on the PPS-enabled pins, which were mapped maximally out to the CSK connector.

You can see this focus by viewing the block diagram in the datasheet -- note how all RP pins are mapped to the CSK Bus, the 64Mbit Flash chip and/or the handshake lines for a radio, and the remaining pins are RPI pins or non-RP pins. Less important / slow functions (like -ON_SD) are mapped to pins without PPS remappability.

The CSK bus is a microcontroller-centric bus .. the Parallel Master Data Port would be more akin to a microprocessor bus.

If you need a PMDP-type functionality, I would suggest you implement it as a separate PIC24 "close to" your parallel device, and then communicate between it and the PIC24GA110 on the PPM D1 via a serial channel. Since PPM D1 has 4 UARTs, all on PPS pins, with lots of unassigned PPS pins, you can _always_ establish a serial comm link between the PPM D1 and a remote parallel (slave) port (processor).