ver 3.2.3 library for iCC430 and 5xx series

[doniol]

There seems to be a bug with the 5xx series cpu where the program counter increments by 4 instead of 2 after a disable interrupt "dint" instruction. A work-around is to add a "nop" after a "dint" so that the next instruction is not screwed up.

OK fine, no problem for my code, but when I try to use the slicc430-y Salvo Tiny library, the OSSched() call (and probably others) have instructions where a "dint" is not followed by a "nop" and my program resets. Is there any way to to get a new library build with this provision?

[aek]

We'll have to get an update for icc430 and regenerate libraries -- it will be a while ...

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[aek]

Hmmm .. it occurred to me that we can pretty easily issue a set of patched libraries that have all instances of dint() followed by a nop() ... using our existing version of iccavr, etc.

I hope to have something for you tomorrow (Fri).

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[doniol]

That is great news.

I had just spent a considerable amount of time designing a new board to use the new features of the 5xx for my thesis. I hope to not have to redesign it again, nor try to change my program to work without salvo. I really appreciate anything you can do!

[aek]

OK, all msp430 distros (lite, tiny, SE, LE & Pro) have been updated with the 3.2.4-d patch, which includes porticc430.h and the libraries for ICC430 (and porticc430.s in Pro distros).

These libraries were all built with dint() followed by a nop().

These have _not_ been tested. Please give that a shot -- I would suggest stepping through a Salvo service (e.g. OSCreateXyz) and a Salvo context switch at the assembly level to see that a NOP follows the DINT used in those code blocks.

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[doniol]

The 3.2.4d patch does not compile in Imagecraft, with error message "__NOP not defined..."

I possibly found a temporary workaround while the patch gets resolved: A NOP is not necessary after a DINT if interrupts are already disabled. So immediately before calling OSSched(), issuing a DINT, followed by a NOP allows OSSched() to successfully run the beginning code without the NOP. I don't know if there are other segments in OSSched() where interrupts are re-enabled / disabled

BECAUSE:

TI decided to change the address of the the Watchdog timer in the 5xx. The code in OSSched() that usually modifies the watchdog timer at 0x0120 now modifies the Power Management Control Register (PMMCTL0). The 5xx enhanced watchdog timer_A address is 0x15C. The PMMCTL0 register has a password and writing to it without the upper byte as A5 results in a reset! :O

Since I'm using a library, I cannot change the configuration
#define OSCLEAR_WATCHDOG_TIMER()
in salvocfg.h.

[This message has been edited by doniol (edited March 23, 2009).]

[doniol]

It turns out the 5xx bug (EEM6 on errata SLAZ046B) has to do with a wrong PC only when using the JTAG interface and breakpoints with 20bit addresses. There is a workaround to manually change the PC at the breakpoint, and the bug does not happen during normal operation.

So, no extra NOPs needed afterall.

BUT, the change of watchdog timer WDTCTL register address issue still remains for 5xx...

[aek]

OK, so if we rebuild the libraries with no writes to the WDT, and you / the user handles that yourself, then that should work OK for now?

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[doniol]

quote:

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Originally posted by aek:
OK, so if we rebuild the libraries with no writes to the WDT, and you / the user handles that yourself, then that should work OK for now?

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Correct, that should solve my issues.

[doniol]

quote:

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Originally posted by aek:
Ok, they're all online (-3.2.4-d.zip).

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Everything is working now as it should. Thanks aek!