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18F452 build "tut6" builds with change to "TMR0"
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|Author||Topic: 18F452 build "tut6" builds with change to "TMR0"|
posted October 26, 2005 14:02
Sorry to hear you're having problems -- that code has been updated to read:
If OSTimer() is being hit, then tasks with delays and/or timeouts will run. Generally, am inability to break on a task with MPSIM may be a by-product of the simulator / debugger not properly associating the line you've set a breakpoint on with the actual code line.
Is <counter> ticking upwards?
We use MPSIM extensively to test Salvo code, and have no problems getting the breakpoints to work ...
posted October 26, 2005 13:27
TMR0 in isr.c is not defined. TMR0L and TMR0H is defined in p18f452.h
Isr.h does perform remapping of TMR0 to TMRL for "SYSP" build control flag:
So I added the following:
// FRG Added this code.
But I do not get any breakpoints to get hit/triggered in the three tasks that should be running, when using the simulator.
I lowered the timer reload value, to attempt to get the system to hit faster.
//FRG to speed up simulator #define TMR0_RELOAD 156 /* for 100Hz ints @ 4MHz */
All times are ET
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